People are always asking “What should I expect when I start designing at 20nm using double patterning?” It’s a good question, but in many real aspects, the answer is “It depends,” and that is not very ...

The challenges of double pattering (DP)-based design are looming large to those customers starting to move to the 20 nm technology node. Of course, much of the fear and trepidation is simply due to it ...

TSMC is planning to adopt double patterning extensively at 20nm, despite the high cost of doing so. Why? Because EUV hasn't come through. Share on Facebook (opens in a new window) Share on X (opens in ...

Cadence Design Systems is targeting designs for the 20nm process node with its latest tools in the Virtuoso suite. Called Virtuoso Advanced Node, the mixed signal chip design tool addresses 20nm ...

Double patterning looks like being the lithography tool of choice at 32nm, but how do you absorb the inevitable extra costs of a double lithography process? According to Applied Materials, the world’s ...

According to Applied Materials, it is. As 32 nm technologies ramp within the next two years, the extension of optical lithography to meet patterning requirements is the industry’s most urgent ...