Hierarchical test methodologies are being broadly adopted for large designs. They provide roughly an order of magnitude better ATPG (automatic test program generation) run time, reduce workstation ...

Silicon Labs' new online timing utility, the Clock Tree Expert tool, was designed to enable embedded developers to generate sophisticated, streamlined clock tree block diagrams within minutes, ...

Seoul-based design studio SWNA has created a clock that incorporates an emergency kit filled with tools, which can be used in the event of a natural disaster. SWNA was approached by Korea Gyeonggido ...

London design duo Studio Ayaskan has created a clock, which rakes sand in hypnotic, concentric circles to mark the passage of time. The Sand project is a nod to Japanese rock gardens, called ...

Here’s an interesting concept for an alarm clock, the Smash Alarm Clock from designer Matthias Lange. When the alarm goes off in the morning, just smash the alarm clock with your fist and the alarm ...

Clock gating is one of the most frequently used techniques in RTL to reduce dynamic power consumption without affecting the functionality of the design. One method involves inserting gating conditions ...